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Silicon Motion targets PCIe 7.0 SSDs for 2027
Silicon Motion has defined its PCIe 7.0 SSD controller architecture, with first samples expected in the second half of 2027.
Image: iXBT
Silicon Motion has started developing a PCIe 7.0 SSD controller for enterprise systems, with the first samples planned for the second half of 2027. Alex Chou, the company’s head of enterprise storage, said the basic architecture of the new Gen7 controller has already been defined.
The company still has to complete its previous generation first. Its PCIe 6.0 SSD controller is currently being emulated on an FPGA platform, with the first silicon samples expected in the second half of 2026. Modern SSD controllers require coordinated development of the interface, firmware, error correction, encryption, virtualization, wear management and latency control.
PCIe 7.0 bandwidth and AI workloads
The PCIe 7.0 specification was approved by PCI-SIG on June 11, 2025. The standard doubles data-transfer speeds compared with PCIe 6.0, reaching 128 GB/s per lane according to the source, while retaining PAM4 signaling and the FLIT mode. A x16 connection is rated for up to 512 GB/s in both directions, while the commonly used x4 SSD configuration has a theoretical limit of about 64 GB/s in one direction.
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Actual SSD performance will depend on the controller, NAND flash, channel count, power consumption and cooling. Silicon Motion sees AI systems as a major use case and links the work to Nvidia’s Storage Next initiative, which targets lower latency between storage and GPUs. For these workloads, consistent performance under simultaneous access from many GPUs, virtual machines and users matters as much as peak sequential throughput.
The company expects future drives to handle large volumes of parallel operations and considers tens of millions of IOPS a realistic target. Earlier estimates of 100–200 million IOPS appear unrealistic in the near term, while around 50 million IOPS is viewed as more achievable. Silicon Motion also plans to improve LDPC error-correction algorithms for future NAND generations.
PCIe 7.0 remains aimed at servers and AI infrastructure rather than home PCs. Wider adoption will require compatible platforms, PCIe 6.0 SSDs and NAND capable of exploiting the new interface.
Computing Editor
Tomas lives in the terminal. He covers chips, laptops, and operating systems with a focus on performance and efficiency. He reads kernel changelogs the way other people read fiction, and he's always on the hunt for the perfect mechanical keyboard switch. If it processes data, Tomas has an opinion on it.
via iXBT
