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Samsung shows NAND chip with more than 400 layers

Samsung’s V10 BV-NAND chip has more than 400 layers and 58% higher density than V9, but no commercial launch date yet.

Image: ITzine

Samsung has shown a new V10 BV-NAND storage chip with more than 400 memory layers, targeting AI servers and high-performance computing. The company presented it at the Future of Memory and Storage 2026 exhibition.

The chip uses Samsung’s 10th-generation vertical NAND architecture and a wafer-bonding design. According to ITzine, citing MobilityArena, Samsung is the first company in the industry to bring this architecture to market. Compared with ninth-generation NAND, V10 BV-NAND offers approximately 58% higher memory density, along with improved read, write, and I/O performance and better energy efficiency.

That density increase is the key change: more data can fit into the same physical footprint, while the architecture is intended to support workloads with heavy real-time data flows. Samsung says the design is built to deliver higher performance without a corresponding increase in power consumption.

The company has not disclosed a commercial launch date, product capacities, or pricing. ITzine reports that V10 BV-NAND could arrive before V11 NAND, whose announcement is expected next year, but that timing is not confirmed.

The technical direction is substantial rather than cosmetic: a claimed 58% density improvement and wafer bonding could make this a meaningful platform for AI infrastructure. Until Samsung provides shipping details and independently verifiable performance figures, however, it remains a promising architecture—not yet a product buyers can evaluate.

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Tomas Berg

Computing Editor

Tomas lives in the terminal. He covers chips, laptops, and operating systems with a focus on performance and efficiency. He reads kernel changelogs the way other people read fiction, and he's always on the hunt for the perfect mechanical keyboard switch. If it processes data, Tomas has an opinion on it.

via ITzine

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