• 3 min read
KAIST builds a transistor that adapts to data speed
KAIST’s PDM memtransistor adapts its response speed in hardware, cutting test prediction error by up to 40 times without continuous power.

Image: ITzine
Researchers at the Korea Advanced Institute of Science and Technology (KAIST) have developed a programmable semiconductor component that can adjust its response speed to match incoming data. The device, called PDM (Programmable Dynamic Memtransistor), is designed for real-time systems such as robots, autonomous vehicles, wearable electronics and AI chips.
How the PDM works
The PDM combines the functions of a transistor and memory element. It performs computations while retaining its programmed characteristics without a continuous power supply. That sets it apart from conventional semiconductor components, whose operating characteristics are fixed after manufacturing.
Its structure contains two functional layers:
- One stores and processes electrical charge.
- The other captures electrons and controls how quickly the device returns to its initial state after receiving a signal.
By changing the characteristics of the electron-capturing layer, the researchers adjusted the transistor’s current-recovery time across roughly a fivefold range. Its characteristic operating frequency could be changed by more than 10 times. The programmed settings remained available without continuous power, allowing some adaptation to data dynamics to move from software into hardware.
That matters when a system must process signals that change at very different rates. A robot’s sensors, for example, may detect a sudden movement lasting fractions of a second alongside a slow change in an object’s position. A conventional system has to compensate for those differences in software, increasing computational work and energy use.

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Tests and remaining evidence
KAIST tested the PDM on time-series data containing both fast and slow changes, as well as handwritten-input data and objects moving at different speeds. In some tests, prediction error was up to 40 times lower than that of a conventional semiconductor element with a fixed response speed.
The team also built an array of PDMs configured with different time characteristics. This allowed the array to analyze signals in parallel across multiple temporal scales. According to the KAIST reporting cited by iXBT, the experimental array approached the accuracy of conventional systems performing similar analysis in software, while using significantly less energy.
That energy claim is the key unresolved point: iXBT said the description provided no precise power-consumption figures. The reporting therefore establishes a promising direction and strong task-specific test results, but not a quantified advantage that can yet be compared with a production AI chip.
The project involved KAIST researchers and specialists from Samsung Electronics' Semiconductor R&D Center. The authors also say the device is compatible with materials already used in the semiconductor industry, which could ease future manufacturing. ITzine emphasizes the component’s potential applications, while iXBT adds the comparison with software-based processing and flags the missing energy data.
The PDM is a substantial change from a fixed-speed transistor: it stores its configuration, adjusts its temporal response in hardware and can process multiple signal speeds at once. But without exact power measurements or evidence of manufacturing at scale, the results support an experimental hardware advance—not yet a proven replacement for conventional AI-chip architectures.
AI Editor
Ava covers the rapidly evolving world of artificial intelligence, from foundational models and research labs to the real-world economics of intelligence. With a background in computational linguistics, she cuts through the hype to find out what actually works. She firmly believes that benchmarks are just marketing until reproduced in the wild.


